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The AMD Phenom family is a
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A ...
microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...
family from Advanced Micro Devices (AMD), based on the K10 microarchitecture. It includes the AMD Phenom II X6 hex-core series, Phenom X4 and Phenom II X4 quad-core series, Phenom X3 and Phenom II X3 tri-core series, and Phenom II X2 dual-core series. Other related processors based on the K10 microarchitecture include the Athlon X2 ''Kuma'' processors, Athlon II processors, and various Opteron, Sempron, and Turion series. The first Phenoms were released in November 2007. An improved second generation was released in December 2008, named Phenom II. Processors with an ''e'' following the model number (e.g., 910e) are low-power models, usually 45 W for Athlons, 65 W for Phenoms. Processors with a "u" following the model number (e.g., 270u) are ultra-low-power models, usually 20 W for single core chips or 25 W for dual core chips.


Features overview

CPU features table


Desktop processors


Phenom series


"''Agena''" (B2/B3, 65 nm, Quad-core)

* All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500


"''Toliman''" (B2/B3, 65 nm, Tri-core)

* Chip harvests from Agena with one core disabledhttps://docs.google.com/spreadsheets/d/19Ms49ip5PBB7nYnf5urxsySvH-Sdy6liE2EBDaB8b54 * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500


Phenom II series


"''Thuban''" (E0, 45 nm, Hexa-core)

* All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'', '' Turbo Core'' (AMD equivalent of Intel Turbo Boost) * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only)


"''Zosma''" (E0, 45 nm, Quad-core)

* Chip harvests from Thuban with two cores disabled * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'', '' Turbo Core'' (AMD equivalent of Intel Turbo Boost) * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only)


"''Deneb''" (C2/C3, 45 nm, Quad-core)

* All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only)


"''Propus''" (C3, 45 nm, Quad-core)

* Chip harvests from Deneb with L3 cache disabled * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet,
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500 (DDR2-1066 MHz), DDR3 SDRAM up to PC3-10600 (DDR3-1333 MHz) (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only)


"''Heka''" (C2/C3, 45 nm, Tri-core)

* Chip harvests from Deneb with one core disabled * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only) * On some Heka triple core processors e.g. 720 BE, the fourth disabled core can be enabled, effectively providing a quad core processor for the price of a triple core. This however does not work on all the processors with one core disabled.


"''Callisto''" (C2/C3, 45 nm, Dual-core)

* Chip harvests from Deneb with two cores disabled * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only) * On some Callisto dual core processors e.g. 555 BE, the two disabled cores can be enabled, effectively providing a quad core processor for the price of a dual core. This however does not work on all the processors with two cores disabled.


"''Regor''" (C3, 45 nm, Dual-core)

* Most Regor-based processors feature double the L2 cache per core (1 MB) as other Athlon II and Phenom II processors. * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR2 SDRAM up to PC2-8500, DDR3 SDRAM up to PC3-10600 (DDR3-1333 MHz) (
Socket AM3 Socket AM3 is a CPU socket for Advanced Micro Devices, AMD Central processing unit, processors. AM3 was launched on February 9, 2009 as the successor to Socket AM2+, alongside the initial grouping of Phenom II processors designed for it. The sole ...
only)


Phenom II 42 TWKR (C2, 45 nm, Quad-core, Limited Edition)

AMD released a limited edition Deneb-based processor to extreme overclockers and partners. Fewer than 100 were made. The "42" officially represents four cores running at 2 GHz, but is also a reference to the answer to life, the universe, and everything from '' The Hitchhiker's Guide to the Galaxy''.


Mobile processors


Turion II Ultra mobile processors (Phenom-based)


"''Caspian''" (45 nm, Dual-core)

* Based on the AMD K10 microarchitecture * All models support: ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''


Turion II mobile processors (Phenom-based)


"''Caspian''" (45 nm, Dual-core)

* Based on the AMD K10 microarchitecture * All models support: ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''


Phenom II mobile processors

* Based on the AMD K10 microarchitecture * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR3 SDRAM, DDR3L SDRAM * Unlike Phenom II desktop processors, Phenom II mobile processors lack L3 cache.


"''Champlain''" (45 nm, Quad-core)


"''Champlain''" (45 nm, Triple-core)


"''Champlain''" (45 nm, Dual-core)


Turion II (Phenom II-based)

* Based on the AMD K10 microarchitecture * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR3 SDRAM, DDR3L SDRAM


"''Champlain''" (45 nm, Dual-core)


Turion II Neo (Phenom II-based)

* Based on the AMD K10 microarchitecture * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR3 SDRAM, DDR3L SDRAM


"''Geneva''" (45 nm, Dual-core)


Embedded processors


V-series (Phenom II-based)

* Based on the AMD K10 microarchitecture * Only 64 bit FPU * All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
, AMD64, Cool'n'Quiet'', ''
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
'' * Memory support: DDR3 SDRAM, DDR3L SDRAM


"''Champlain''" (45 nm, Single-core)


"''Geneva''" (45 nm, Single-core)


Notes


See also

* List of AMD Athlon II microprocessors * AMD Phenom * AMD K10 * List of AMD microprocessors *
Table of AMD processors References See also * List of AMD microprocessors * List of AMD CPU microarchitectures * List of AMD mobile microprocessors * List of AMD Athlon microprocessors * List of AMD Athlon XP microprocessors * List of AMD Athlon 64 microprocess ...


References


External links


Model Number and Feature Comparisons - AMD Phenom II X4 Processors

Official AMD processors for desktop comparison website

Legit Reviews:AMD 42 TWKR BE
{{DEFAULTSORT:List Of Amd Phenom Microprocessors *Phenom AMD Phenom ja:AMD Phenom ja:AMD Phenom II