The following is a list of PowerPC processors.
General-purpose PowerPC processors
IBM/Motorola
PowerPC 600 family
*
601
__NOTOC__
Year 601 (DCI) was a common year starting on Sunday (link will display the full calendar) of the Julian calendar. The denomination 601 for this year has been used since the early medieval period, when the Anno Domini calendar era ...
50 and 66 MHz
*
602
__NOTOC__
Year 602 ( DCII) was a common year starting on Monday (link will display the full calendar) of the Julian calendar. The denomination 602 for this year has been used since the early medieval period, when the Anno Domini calendar era b ...
consumer products (multiplexed data/address bus)
*
603
__NOTOC__
Year 603 ( DCIII) was a common year starting on Tuesday (link will display the full calendar) of the Julian calendar. The denomination 603 for this year has been used since the early medieval period, when the Anno Domini calendar e ...
/
603e/
603ev notebooks, embedded devices
*
604
__NOTOC__
Year 604 ( DCIV) was a leap year starting on Wednesday (link will display the full calendar) of the Julian calendar. The denomination 604 for this year has been used since the early medieval period, when the Anno Domini calendar era b ...
/
604e The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened ...
/
604ev workstations and low end servers
*
620
__NOTOC__
Year 620 ( DCXX) was a leap year starting on Tuesday (link will display the full calendar) of the Julian calendar. The denomination 620 for this year has been used since the early medieval period, when the Anno Domini calendar era ...
the first 64-bit implementation
PowerPC 7xx family
* 740/750 (1997) 233–366 MHz
Motorola/Freescale
PowerPC 7xx family
*
PowerPC 740 and 750, 233–366 MHz
*
745/755, 300–466 MHz
PowerPC 74xx family
* 7400/7410 350–550 MHz, uses
AltiVec, a
SIMD
Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy. SIMD can be internal (part of the hardware design) and it can be directly accessible through an instruction set architecture (ISA), but it should ...
extension of the original PPC specs
* 7440/7450 micro-architecture family up to 1.5 GHz and 256 kB on-chip L2 cache and improved Altivec
* 7447/7457 micro-architecture family up to 1.83 GHz with 512 kB on-chip L2 cache
* 7448 micro-architecture family (2.0 GHz) in 90 nm with 1MB L2 cache and slightly improved AltiVec (out of order instructions).
*8640/8641/8640D/8641D with one or two e600 cores, 1MB L2 cache
IBM
IBM Power microprocessors
IBM Power microprocessors (originally POWER prior to Power10) are designed and sold by IBM for servers and supercomputers. The name "POWER" was originally presented as an acronym for "Performance Optimization With Enhanced RISC". The Power l ...
*
POWER3
The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture (ISA), including all of the optional instructions of the ISA (at the time) such as ...
, 64-bit, 200–450 MHz (as POWER3-II), originally the PowerPC 630. Introduced in 1998.
*
POWER4
The POWER4 is a microprocessor developed by International Business Machines (IBM) that implemented the 64-bit PowerPC and PowerPC AS instruction set architectures. Released in 2001, the POWER4 succeeded the POWER3 and RS64 microprocessors, ena ...
, 64-bit, dual core, 1.0–1.9 GHz (as POWER4+), follows the PowerPC 2.00 ISA. Introduced in 2001.
*
POWER5, 64-bit, dual core, 2 way
SMT/core, 1.6–2.0 GHz, follows the PowerPC 2.01 ISA. Introduced in 2004.
*
POWER5+, 64-bit, dual core, 2 way SMT/core, 1.9–2.2 GHz, follows the PowerPC 2.02 ISA. Introduced in 2005.
*
POWER6
The POWER6 is a microprocessor developed by IBM that implemented the Power ISA v.2.03. When it became available in systems in 2007, it succeeded the POWER5+ as IBM's flagship Power microprocessor. It is claimed to be part of the eCLipz projec ...
, 64-bit, dual core, 2 way SMT/core, 3.6–4.7 GHz, follows the Power ISA 2.03. Introduced in 2007.
*
POWER6+, 64 bit, dual core, 2 way SMT/core, 5.0 GHz, follows the Power ISA 2.05. Introduced in 2009.
*
POWER7
POWER7 is a family of superscalar multi-core microprocessors based on the Power ISA 2.06 instruction set architecture released in 2010 that succeeded the POWER6 and POWER6+. POWER7 was developed by IBM at several sites including IBM's Roches ...
, 64-bit octo core, 4 way SMT/core, 2.4–4.25 GHz, follows the Power ISA 2.06. Introduced in 2010.
*
POWER7+, 64-bit octo core, 4 way SMT/core, 3.0–5.0 GHz, follows the Power ISA 2.06. Introduced in 2012.
*
POWER8
POWER8 is a family of superscalar multi-core microprocessors based on the Power ISA, announced in August 2013 at the Hot Chips conference. The designs are available for licensing under the OpenPOWER Foundation, which is the first time for ...
, 64-bit, hex or twelve core, 8 way SMT/core, 5.0 GHz, follows the Power ISA 2.07. Introduced in 2014.
*
POWER9
POWER9 is a family of superscalar, multithreading, multi-core microprocessors produced by IBM, based on the Power ISA. It was announced in August 2016. The POWER9-based processors are being manufactured using a 14 nm FinFET process ...
, 64-bit, PowerNV 24 cores of 4 way SMT/core, PowerVM 12 cores of 8 way SMT/core, follows the Power ISA 3.0. Introduced in 2016.
*
Power10
Power10 is a superscalar, multithreading, multi-core microprocessor family, based on the open source Power ISA, and announced in August 2020 at the Hot Chips conference; systems with Power10 CPUs. Generally available from September 2021 in t ...
, 64-bit, 15 SMT8 or 30 SMT4 cores, will follow the Power ISA 3.1. Introduced in 2021.
RS64
The IBM RS64 is a family of microprocessors used in IBM's RS/6000 and AS/400 servers in the late 1990s.
These microprocessors implement the "Amazon", or "PowerPC-AS", instruction set architecture (ISA). Amazon is a superset of the PowerPC ins ...
* A10 (Cobra), 50–77 MHz, 1995, single chip processor for Series i
* A25/30 (Muskie), 125–154 MHz, 1996, multi chip, 4 way SMP for Series i
* RS64 (Apache), 64-bit, 125 MHz, 1997 for large scale SMP systems Series i and Series p
* RS64-II (Northstar), 262 MHz, 1998
* RS64-III (Pulsar, Istar), 450 MHz in 1999, 600 in 2000
* RS64-IV (Sstar), 750 MHz, multithreading, 2000
PowerPC 7xx family
*
750CL with 256 kB on die L2 cache at 400–900 MHz introduced in 2006
*
750CX/CXe with 256 kB on die L2 cache at 350–600 MHz
*
750FX with 512 kB L2 cache announced by IBM in 2001 and available early 2002 at 1 GHz
*
750GX with 1 MB L2 cache introduced by IBM in 2003
PowerPC 970 family
* 970 (2003), 64-bit, derived from
POWER4
The POWER4 is a microprocessor developed by International Business Machines (IBM) that implemented the 64-bit PowerPC and PowerPC AS instruction set architectures. Released in 2001, the POWER4 succeeded the POWER3 and RS64 microprocessors, ena ...
, enhanced with
VMX, 512 kB L2 cache, 1.4–2 GHz
* 970FX (2004), manufactured at
90 nm
The 90 nm process refers to the level of MOSFET ( CMOS) fabrication process technology that was commercialized by the 2003–2005 timeframe, by leading semiconductor companies like Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, Elpi ...
, 1.8–2.7 GHz
* 970GX (2006), manufactured at
90 nm
The 90 nm process refers to the level of MOSFET ( CMOS) fabrication process technology that was commercialized by the 2003–2005 timeframe, by leading semiconductor companies like Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, Elpi ...
, 1MB L2 cache/core, 1.2–2.5 GHz
* 970MP (2005), dual core, 1 MB L2 cache/core, 1.6–2.5 GHz
Cell
Cell most often refers to:
* Cell (biology), the functional basic unit of life
Cell may also refer to:
Locations
* Monastic cell, a small room, hut, or cave in which a religious recluse lives, alternatively the small precursor of a monastery w ...
*
Cell BE, 64-bit
PPE-core, 2 way multithreading, VMX, 512 kB L2 cache, 8x SPE, 8x 256 kB Local Store memory, 3.2 GHz, follows the PowerPC 2.02 ISA
* Cell BE 65 nm, same as above but manufactured on a 65 nm process
* PowerXCell 8i, same as above but with enhanced double precision SPEs and support for DDR-RAM
Supercomputer
*
Blue Gene/L
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with low power consumption.
The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, ...
, dual core PowerPC 440, 700 MHz, 2004
*
Blue Gene/P
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with low power consumption.
The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, ...
, quad core PowerPC 450, 850 MHz, 2007
*
Blue Gene/Q
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with low power consumption.
The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, ...
, 18 core PowerPC A2, 1.6 GHz, 2011
Other
*
Exponential Technology
Exponential Technology was a vendor of PowerPC microprocessors. The company was founded by George Taylor and Jim Blomgren in 1993. The company's plan was to use BiCMOS technology to produce very fast processors for the Apple Computer market. Logic ...
x704
The x704 is a microprocessor that implements the 32-bit version of the PowerPC instruction set architecture (ISA) developed by Exponential Technology. The microprocessor was notable for its high clock frequency (for the time, circa 1997) in the ran ...
, a
BiCMOS
Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two semiconductor technologies, those of the bipolar junction transistor and the CMOS (complementary metal-oxide-semiconductor) logic gate, into a single integrated circuit. I ...
PowerPC implementation, 410 to 533 MHz
*
P.A. Semi
P. A. Semi (originally Palo Alto Semiconductor) was an American fabless semiconductor company founded in Santa Clara, California in 2003 by Daniel W. Dobberpuhl, who was previously the lead designer for the DEC Alpha 21064 and StrongARM proces ...
PWRficient
PWRficient is a microprocessor series by P.A. Semi where the PA6T-1682M was the only one that became an actual product.
PWRficient processors comply with the 64-bit Power ISA, and are designed for high performance and extreme power efficiency. T ...
PA6T-1682M, a dual-core microprocessor that runs at 2 GHz
Embedded PowerPC
32-bit and 64-bit PowerPC processors have been a favorite of embedded computer designers. To keep costs low on high-volume competitive products, the CPU core is usually bundled into a system-on-chip (SOC) integrated circuit. SOCs contain the processor core, cache and the processor's local data on-chip, along with clocking, timers, memory (SDRAM), peripheral (network, serial I/O), and bus (PCI, PCI-X, ROM/Flash bus, I2C) controllers. IBM also offers an open bus architecture (called
CoreConnect __NOTOC__
CoreConnect is a microprocessor bus-architecture from IBM for system-on-a-chip (SoC) designs. It was designed to ease the integration and reuse of processor, system, and peripheral cores within standard and custom SoC designs. As a stan ...
) to facilitate connection of the processor core to memory and peripherals in a SOC design. IBM and Motorola have competed along parallel development lines in overlapping markets. A later development was th
Book E PowerPC Specification implemented by both IBM and Freescale Semiconductor, which defines embedded extensions to the PowerPC programming model.
AMCC
*
440SP: 533–667 MHz, 10/100/1G Ethernet, (2) 64bit PCI-X, 32bit PCI-X, XOR engine, 32k L1 Cache.
*
440SPe: 533–667 MHz, 10/100/1G Ethernet, (3) 64bit PCI-Express, 64bit PCI-X, XOR engine, 32k L1 Cache.
*
440EPx: 333–667 MHz, (2) 10/100/1G Ethernet, Hardware Security, PCI, DDR-II, FPU, USB 1.1 or USB 2.0, 32k L1 Cache.
*
440GR: 333–667 MHz, (2) 10/100 Ethernet, (4) UART, (2) IIC, 53 GPIO, SPI, 32k L1 Cache.
*
440GRx: 333–667 MHz, (2) 10/100/1G Ethernet, (4) UART, (2) IIC, 53 GPIO, SPI, DDR-II, Hardware Security, 32k L1 Cache.
* PowerPC
Titan
Titan most often refers to:
* Titan (moon), the largest moon of Saturn
* Titans, a race of deities in Greek mythology
Titan or Titans may also refer to:
Arts and entertainment
Fictional entities
Fictional locations
* Titan in fiction, fiction ...
, 32-bit, dual core, 2 GHz. Announced, planned release in 2008
Broad Reach Engineering
*
BRE440 radiation hardened
Radiation hardening is the process of making electronic components and circuits resistant to damage or malfunction caused by high levels of ionizing radiation (particle radiation and high-energy electromagnetic radiation), especially for environ ...
CPU based on
PowerPC 440
The PowerPC 400 family is a line of 32-bit embedded RISC processor cores based on the PowerPC or Power ISA instruction set architectures. The cores are designed to fit inside specialized applications ranging from system-on-a-chip (SoC) microcont ...
core with 256 kB L2 Cache, PCI, (2) 10/100 Ethernet, 4-CH DMA, (2) UART, extensive on chip memory control. Designed specifically for radiation environments and extreme temperature environments (such as space).
BAE Systems
*
RAD750
The RAD750 is a radiation-hardened single-board computer manufactured by BAE Systems Electronics, Intelligence & Support. The successor of the RAD6000, the RAD750 is for use in high-radiation environments experienced on board satellites and spac ...
radiation hardened
Radiation hardening is the process of making electronic components and circuits resistant to damage or malfunction caused by high levels of ionizing radiation (particle radiation and high-energy electromagnetic radiation), especially for environ ...
CPU based on
PowerPC 750
The PowerPC 7xx is a family of third generation 32-bit PowerPC microprocessors designed and manufactured by IBM and Motorola (spun off as Freescale Semiconductor bought by NXP Semiconductors). This family is called the PowerPC G3 by its well-kno ...
core.
Culturecom
*
V-Dragon based on
PowerPC 405 core.
Cray
* SeaStar, SeaStar2 and SeaStar2+,
PowerPC 440
The PowerPC 400 family is a line of 32-bit embedded RISC processor cores based on the PowerPC or Power ISA instruction set architectures. The cores are designed to fit inside specialized applications ranging from system-on-a-chip (SoC) microcont ...
based communications processors for their
Opteron
Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sled ...
based
XT3,
XT4
The Cray XT4 (codenamed ''Hood'' during development) is an updated version of the Cray XT3 supercomputer. It was released on November 18, 2006. It includes an updated version of the SeaStar interconnect router called SeaStar2, processor sockets ...
and
XT5 supercomputers.
Freescale (former Motorola)
* MPC8xx
PowerQUICC
PowerQUICC is the name for several PowerPC- and Power ISA-based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the Communications Processor Module ( QUICC Engine) which is a separate RISC core ...
– networking & telecom card controllers with embedded communications module, up to 80 MHz
*
MPC5xx
The MPC5xx family of processors such as the MPC555 and MPC565 are 32-bit PowerPC embedded microprocessors that operate between 40 and 66 MHz and are frequently used in automotive applications including engine and transmission controllers. Delphi ...
– automotive & industrial controllers
*
MPC51xx/
MPC52xx –
e300 core, automotive & industrial
system on a chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memor ...
(SoC) controllers, up to 466 MHz
*
MPC55xx –
e200 core, automotive & industrial controllers, up to 144 MHz
*
MPC56xx –
e200 core, automotive & industrial controllers, up to 264 MHz
* MPC82xx
PowerQUICC II –
603e core, networking & telecom SoC controllers with high-capacity on-chip switched bus and communications module, up to 450 MHz
* MPC83xx
PowerQUICC II Pro –
e300 core, networking & telecom SoC controllers with high-capacity on-chip switched bus and communications module, up to 667 MHz
* MPC85xx
PowerQUICC III –
e500 core, high end networking & telecom SoC controllers with high-capacity on-chip switched bus and communications module. D Dual core versions supporting both symmetric and asymmetric multiprocessing, up to 1.5 GHz.
* MPC864x –
e600 core, 1 MB L2 cache, improved
AltiVec (out of order instructions), an embedded memory controller, Ethernet controllers, a
RapidIO
The RapidIO architecture is a high-performance packet-switched electrical connection technology. RapidIO supports messaging, read/write and cache coherency semantics. Based on industry-standard electrical specifications such as those for Ether ...
fabric interface, a
PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common m ...
interface, and MPX bus. Dual core versions supporting both symmetric and asymmetric multiprocessing, up to 1.5 GHz.
*
QorIQ
QorIQ is a brand of ARM-based and Power ISA-based communications microprocessors from NXP Semiconductors (formerly Freescale). It is the evolutionary step from the PowerQUICC platform, and initial products were built around one or more e50 ...
Processing Platforms (evolution of the
PowerQUICC
PowerQUICC is the name for several PowerPC- and Power ISA-based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the Communications Processor Module ( QUICC Engine) which is a separate RISC core ...
). The first letter of the model indicates the series, the second and the third model number indicates the number of cores (e.g. P5040 has four cores, T4240 has 24 cores)
**
P series
***
P1 series,
e500v2 cores: P1011, P1020
***
P2 series:
e500v2 core P2020,
e500mc cores P2040, P2041
***
P3 series, introduced in 2010, based on
e500mc cores: P3041
***
P4 series, introduced in 2009, based on
e500mc cores: P4080
***
P5 series, introduced in 2012, 45 nm process, based on
e5500 cores: P5010, P5020, P5021, P5040
**
T series, introduced in 2013, all based on
e6500 cores, and 28 nm process
***
T1 series: T1040, T1042, T1020, T1022
***
T2 series: T2080, T2081
***
T4 series: T4240, T4160, T4080
IBM (now from AMCC)
*
401
__NOTOC__
Year 401 ( CDI) was a common year starting on Tuesday (link will display the full calendar) of the Julian calendar. At the time, it was known as the Year of the Consulship of Vincentius and Fravitus (or, less frequently, year 1154 ...
*
403
Year 403 ( CDIII) was a common year starting on Thursday (link will display the full calendar) of the Julian calendar. At the time, it was known as the Year of the Consulship of Theodosius and Rumoridus (or, less frequently, year 1156 ''Ab ...
: MMU added in most advanced version 403GCX
*
405
__NOTOC__
Year 405 ( CDV) was a common year starting on Sunday (link will display the full calendar) of the Julian calendar. At the time, it was known as the Year of the Consulship of Stilicho and Anthemius (or, less frequently, year 1158 ''Ab ...
: MMU, Ethernet, serial, PCI, SRAM, SDRAM; NPe405 adds more network devices
*
440
Year 440 (CDXL) was a leap year starting on Monday (link will display the full calendar) of the Julian calendar. At the time, it was known as the Year of the Consulship of Valentinianus and Anatolius (or, less frequently, year 1193 ''Ab urbe ...
: A range of processors based on the Book E core.
**
440EP: 333–667 MHz, (2) 10/100 Ethernet, PCI, DDR, FPU, USB 1.1 or USB 2.0, 32k L1 Cache.
**
440GP: 400–500 MHz, (2) 10/100 Ethernet, PCI-X, DDR, 32k L1 Cache.
**
440GX 44 may refer to:
* 44 (number)
* one of the years 44 BC, AD 44, 1944, 2044
Military
*44M Tas, a Hungarian medium/heavy tank design of World War II
*44M Tas Rohamlöveg, a Hungarian tank destroyer design of World War II, derived from the 44M Tas ta ...
: 533–800 MHz, (2) 10/100 Ethernet, (2) 10/100/1G Ethernet with TCP/IP hardware acceleration, PCI-X, DDR, 32k L1 Cache
Microsoft
*
Xenon
Xenon is a chemical element with the symbol Xe and atomic number 54. It is a dense, colorless, odorless noble gas found in Earth's atmosphere in trace amounts. Although generally unreactive, it can undergo a few chemical reactions such as the ...
(Microsoft Xbox 360) – Three core
PPE-based, 1 MB shared L2 cache,
VMX128, 3.2 GHz
Nintendo
*
Gekko
''Gekko'' is a genus of Southeast Asian geckos, commonly known as true geckos or calling geckos, in the family Gekkonidae. Although species such as '' Gekko gecko'' (tokay gecko) are very widespread and common, some species in the same genus ha ...
(GameCube) – 750CXe core with special enhancements, 486 MHz
*
Broadway
Broadway may refer to:
Theatre
* Broadway Theatre (disambiguation)
* Broadway theatre, theatrical productions in professional theatres near Broadway, Manhattan, New York City, U.S.
** Broadway (Manhattan), the street
**Broadway Theatre (53rd Stree ...
(Wii) – 750CL, 729 MHz
*
Espresso
Espresso (, ) is a coffee-brewing method of Italian origin, in which a small amount of nearly boiling water (about ) is forced under of pressure through finely-ground coffee beans. Espresso can be made with a wide variety of coffee beans an ...
(Wii U) – 3 × 750 cores, 1.24 GHz
P.A. Semi
*
PWRficient
PWRficient is a microprocessor series by P.A. Semi where the PA6T-1682M was the only one that became an actual product.
PWRficient processors comply with the 64-bit Power ISA, and are designed for high performance and extreme power efficiency. T ...
PA6T-1682M: a dual core PPC running at 2 GHz
Rapport
*
Kilocore
Kilocore was a high-performance, low-power multi-core microprocessor that has 1,025 cores designed by Rapport Inc. and IBM and announced in 2006. Rapport was a California fabless semiconductor company founded in 2001 and dissolved in 2009.
Kilo ...
1025: a CPU with a single PowerPC core and 1024 processing element (8 bit, 125 MHz) cores (unreleased). This CPU is designed for running security and multimedia applications (with parallel processing) on portable game devices and media players.
Xilinx
* Some Virtex-II Pro and Virtex-4
FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence the term ''Field-programmability, field-programmable''. The FPGA configuration is generally specifi ...
have up to two embedded
PowerPC 405 cores,.
Virtex-4 family overview
* Virtex-5 FXT has up to two embedded PowerPC 440 cores.
Northbridge
Northbridge or host bridge for PowerPC CPU is an Integrated Circuit (IC) for interfacing PowerPC CPU with memory, and Southbridge IC. Some Northbridge also provide interface for Accelerated Graphics Port
Accelerated Graphics Port (AGP) is a parallel expansion card standard, designed for attaching a video card to a computer system to assist in the acceleration of 3D computer graphics. It was originally designed as a successor to PCI-type conn ...
s (AGP) bus, Peripheral Component Interconnect
Peripheral Component Interconnect (PCI) is a local computer bus for attaching hardware devices in a computer and is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format ...
(PCI), PCI-X, PCI Express, or Hypertransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
bus. Specific Northbridge IC must be used for PowerPC CPU. It is impossible to use Northbridge for Intel or AMD x86 CPU with PowerPC CPU. However it is possible to use certain types of x86 Southbridge in PowerPC based motherboards. Example: VIA
Via or VIA may refer to the following:
Science and technology
* MOS Technology 6522, Versatile Interface Adapter
* ''Via'' (moth), a genus of moths in the family Noctuidae
* Via (electronics), a through-connection
* VIA Technologies, a Taiw ...
686B and AMD
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufact ...
Geode CS5536.
List of Northbridge for PowerPC:
*IBM:
**CPC 700 and CPC 710 for IBM PowerPC 750 series.
**CPC 925 and CPC 945 for IBM PowerPC 970 series.
*Motorola (now available from Tundra):
**MPC-105
**MPC-106
**MPC-107
*Mentor Arc Inc. (MAI).
**Articia S.
*Marvell Marvell may refer to:
* Marvell, Arkansas, a small city in the United States
* Marvell Technology Group, American semiconductor company
People
* Andrew Marvell (1621–1678), English metaphysical poet and politician
* Marcus Marvell (born 1970), E ...
Discovery series for Motorola MPC74xx and MPC75x and IBM 750 series CPU.
**Discovery ( GT-64260A, GT-64261A and GT-64262A).
**Discovery LT (MV64420 and MV64430).
**Discovery II (MV64360, MV6361 and MV6362).
**Discovery III (MV64460, MV6461 and MV6462).
**Discovery V (MV 64560).
**Discovery VI(MV 64660).
*Philips Semiconductor
**VAS96011 and VAS96012: Two IC northbridge for PowerPC 603 and PowerPC 604.
*Tundra (Canada)
**TSI-106 (formerly Motorola MPC-106).
**TSI-107 (formerly Motorola MPC-107) / XPC107APX series.
**TSI-108
**TSI-109
**TSI-110
**Qspan II – PCI bus interface for PowerPC CPU.
**PowerPro (CA91L750) – Memory controller for PowerPC CPU.
See also
*PowerPC applications Microprocessors belonging to the PowerPC/Power ISA architecture family have been used in numerous applications.
Personal Computers
Apple Computer was the dominant player in the market of personal computers based on PowerPC processors until 2006 ...
*Power ISA
Power ISA is a reduced instruction set computer (RISC) instruction set architecture (ISA) currently developed by the OpenPOWER Foundation, led by IBM. It was originally developed by IBM and the now-defunct Power.org industry group. Power ISA ...
References
{{reflist
P