HOME

TheInfoList



OR:

Kepler is the codename for a GPU
microarchitecture In electronics, computer science and computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as μarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular ...
developed by
Nvidia Nvidia Corporation ( ) is an American multinational corporation and technology company headquartered in Santa Clara, California, and incorporated in Delaware. Founded in 1993 by Jensen Huang (president and CEO), Chris Malachowsky, and Curti ...
, first introduced at retail in April 2012, as the successor to the Fermi microarchitecture. Kepler was Nvidia's first microarchitecture to focus on energy efficiency. Most GeForce 600 series, most GeForce 700 series, and some
GeForce 800M series The GeForce 800M series is a family of graphics processing units by Nvidia for laptop PCs. It consists of rebrands of mobile versions of the GeForce 700 series and some newer chips that are lower end compared to the rebrands. The GeForce 800 s ...
GPUs were based on Kepler, all manufactured in 28 nm. Kepler found use in the GK20A, the GPU component of the Tegra K1 SoC, and in the Quadro Kxxx series, the Quadro NVS 510, and Tesla computing modules. Kepler was followed by the
Maxwell Maxwell may refer to: People * Maxwell (surname), including a list of people and fictional characters with the name ** James Clerk Maxwell, mathematician and physicist * Justice Maxwell (disambiguation) * Maxwell baronets, in the Baronetage of N ...
microarchitecture and used alongside Maxwell in the GeForce 700 series and
GeForce 800M series The GeForce 800M series is a family of graphics processing units by Nvidia for laptop PCs. It consists of rebrands of mobile versions of the GeForce 700 series and some newer chips that are lower end compared to the rebrands. The GeForce 800 s ...
. The architecture is named after
Johannes Kepler Johannes Kepler (27 December 1571 – 15 November 1630) was a German astronomer, mathematician, astrologer, Natural philosophy, natural philosopher and writer on music. He is a key figure in the 17th-century Scientific Revolution, best know ...
, a German mathematician and key figure in the 17th century
Scientific Revolution The Scientific Revolution was a series of events that marked the emergence of History of science, modern science during the early modern period, when developments in History of mathematics#Mathematics during the Scientific Revolution, mathemati ...
.


Overview

The goal of Nvidia's previous architecture was design focused on increasing performance on compute and tessellation. With the Kepler architecture, Nvidia targeted their focus on efficiency, programmability, and performance. The efficiency aim was achieved through the use of a unified GPU clock, simplified static scheduling of instruction and higher emphasis on performance per watt. By abandoning the shader clock found in their previous GPU designs, efficiency is increased, even though it requires additional cores to achieve higher levels of performance. This is not only because the cores are more power-friendly (two Kepler cores using 90% power of one Fermi core, according to Nvidia's numbers), but also the change to a unified GPU clock scheme delivers a 50% reduction in power consumption in that area. Programmability aim was achieved with Kepler's Hyper-Q, Dynamic Parallelism and multiple new Compute Capabilities 3.x functionality. With it, higher GPU utilization and simplified code management was achievable with GK GPUs thus enabling more flexibility in programming for Kepler GPUs. Finally with the performance aim, additional execution resources (more CUDA cores, registers and cache) and with Kepler's ability to achieve a memory clock speed of 7 GHz, increases Kepler's performance when compared to previous Nvidia GPUs.


Features

The GK Series GPU contains features from both the older Fermi and newer Kepler generations. Kepler based members add the following standard features: * PCI Express 3.0 interface *
DisplayPort DisplayPort (DP) is a digital interface used to connect a video source, such as a Personal computer, computer, to a display device like a Computer monitor, monitor. Developed by the Video Electronics Standards Association (VESA), it can also car ...
1.2 *
HDMI High-Definition Multimedia Interface (HDMI) is a proprietary digital interface used to transmit high-quality video and audio signals between devices. It is commonly used to connect devices such as televisions, computer monitors, projectors, gam ...
1.4a 4K x 2K video output * PureVideo VP5 hardware video acceleration (up to 4K x 2K H.264 decode) * Hardware H.265 decoding * Hardware H.264 encoding acceleration block (NVENC) * Support for up to 4 independent 2D displays, or 3 stereoscopic/3D displays (NV Surround) * Next Generation Streaming Multiprocessor (SMX) * Polymorph-Engine 2.0 * Simplified Instruction Scheduler * Bindless Textures *
CUDA In computing, CUDA (Compute Unified Device Architecture) is a proprietary parallel computing platform and application programming interface (API) that allows software to use certain types of graphics processing units (GPUs) for accelerated gene ...
Compute Capability 3.0 to 3.5 * GPU Boost (Upgraded to 2.0 on GK110) * TXAA Support * Manufactured by
TSMC Taiwan Semiconductor Manufacturing Company Limited (TSMC or Taiwan Semiconductor) is a Taiwanese multinational semiconductor contract manufacturing and design company. It is one of the world's most valuable semiconductor companies, the world' ...
on a 28 nm process * New Shuffle Instructions * Dynamic Parallelism * Hyper-Q (Hyper-Q's MPI functionality reserve for Tesla only) * Grid Management Unit * Nvidia GPUDirect (GPU Direct's RDMA functionality reserve for Tesla only)


Next Generation Streaming Multiprocessor (SMX)

Kepler employs a new streaming multiprocessor architecture called SMX. CUDA execution core counts were increased from 32 per each of 16 SMs to 192 per each of 8 SMX; the register file was only doubled per SMX to 65,536 x 32-bit for an overall lower ratio; between this and other compromises, despite the 3x overall increase in CUDA cores and clock increase (on the 680 vs. the Fermi 580), the actual performance gains in most operations were well under 3x. Dedicated FP64 CUDA cores are used rather than treating two FP32 cores as a single unit as was done previously, and very few were included on the consumer models resulting in 1/24th speed FP64 calculation compared to FP32. On the HPC models, the GK110/210, the SMX count was raised to 13-15 depending on the product, and more FP64 cores were included to bring the compute ratio up to 1/3rd FP32. On the GK110, per-thread register limit was quadrupled over fermi to 255, but this still only allows a thread using half of the registers to parallelize to 1/4 of each SMX. The GK210 (released at the same time) increased the register limit to 512 to improve performance in high register pressure situations like this. Texture cache, which programmers had already been using for compute as a read-only buffer in previous generations, was increased in size and the data path optimized for faster throughput when using this method. All levels of memory including the register file are single-bit ECC as well. Another notable feature is that while Fermi GPUs could only be accessed by one CPU thread at a time, the HPC Kepler GPUs added multithreading support so high core count processors could open 32 connections and more easily saturate the compute capability.


Simplified Instruction Scheduler

Additional die space reduction and power saving was achieved by removing a complex hardware block that handled the prevention of data hazards.


GPU Boost

GPU Boost is a new feature which is roughly analogous to turbo boosting of a CPU. The GPU is always guaranteed to run at a minimum clock speed, referred to as the "base clock". This clock speed is set to the level which will ensure that the GPU stays within TDP specifications, even at maximum loads. When loads are lower, however, there is room for the clock speed to be increased without exceeding the TDP. In these scenarios, GPU Boost will gradually increase the clock speed in steps, until the GPU reaches a predefined power target of 170W by default (on the 680 card). By taking this approach, the GPU will ramp its clock up or down dynamically, so that it is providing the maximum amount of speed possible while remaining within TDP specifications. The power target, as well as the size of the clock increase steps that the GPU will take, are both adjustable via third-party utilities and provide a means of overclocking Kepler-based cards.


Microsoft Direct3D Support

Nvidia Fermi and Kepler GPUs in the GeForce 600 series support the Direct3D 11.0 specification. Nvidia originally stated that the Kepler architecture has full
DirectX Microsoft DirectX is a collection of application programming interfaces (APIs) for handling tasks related to multimedia, especially game programming and video, on Microsoft platforms. Originally, the names of these APIs all began with "Direct" ...
11.1 support, which includes the Direct3D 11.1 path. The following "Modern UI" Direct3D 11.1 features, however, are not supported: * Target-Independent Rasterization (2D rendering only). * 16xMSAA Rasterization (2D rendering only). * Orthogonal Line Rendering Mode. * UAV (Unordered Access View) in non-pixel-shader stages. According to the definition by Microsoft, Direct3D feature level 11_1 must be complete, otherwise the Direct3D 11.1 path can not be executed. The integrated Direct3D features of the Kepler architecture are the same as those of the GeForce 400 series Fermi architecture.


Next Microsoft Direct3D Support

Nvidia Kepler GPUs of the GeForce 600/700 series support Direct3D 12 feature level 11_0.


TXAA Support

Exclusive to Kepler GPUs, TXAA is a new anti-aliasing method from Nvidia that is designed for direct implementation into game engines. TXAA is based on the MSAA technique and custom resolve filters. It is designed to address a key problem in games known as shimmering or temporal aliasing. TXAA resolves that by smoothing out the scene in motion, making sure that any in-game scene is being cleared of any aliasing and shimmering.


Shuffle Instructions

The GK110 had a small number of instructions added to further improve performance. New shuffle instructions allow for threads within a warp to share data amongst themselves with an instruction that completes the normal store and load operations that previously required two accesses to local memory within one instruction, making the process around 6% faster than using local data storage. Atomic operations were also improved, with 9x increases in speed for some instructions and the addition of more atomic 64-bit operations, namely min, max, and, or, and xor.


Hyper-Q

Hyper-Q expands GK110 hardware work queues from 1 to 32. The significance of this being that having a single work queue meant that Fermi could be under occupied at times as there wasn't enough work in that queue to fill every SM. By having 32 work queues, GK110 can in many scenarios, achieve higher utilization by being able to put different task streams on what would otherwise be an idle SMX. The simple nature of Hyper-Q is further reinforced by the fact that it's easily mapped to MPI, a common message passing interface frequently used in HPC. As legacy MPI-based algorithms that were originally designed for multi-CPU systems that became bottlenecked by false dependencies now have a solution. By increasing the number of MPI jobs, it's possible to utilize Hyper-Q on these algorithms to improve the efficiency all without changing the code itself.


Dynamic Parallelism

Dynamic Parallelism ability is for kernels to be able to dispatch other kernels. With Fermi, only the CPU could dispatch a kernel, which incurs a certain amount of overhead by having to communicate back to the CPU. By giving kernels the ability to dispatch their own child kernels, GK110 can both save time by not having to go back to the CPU, and in the process free up the CPU to work on other tasks.


Grid Management Unit

Enabling Dynamic Parallelism requires a new grid management and dispatch control system. The new Grid Management Unit (GMU) manages and prioritizes grids to be executed. The GMU can pause the dispatch of new grids and queue pending and suspended grids until they are ready to execute, providing the flexibility to enable powerful runtimes, such as Dynamic Parallelism. The CUDA Work Distributor in Kepler holds grids that are ready to dispatch, and is able to dispatch 32 active grids, which is double the capacity of the Fermi CWD. The Kepler CWD communicates with the GMU via a bidirectional link that allows the GMU to pause the dispatch of new grids and to hold pending and suspended grids until needed. The GMU also has a direct connection to the Kepler SMX units to permit grids that launch additional work on the GPU via Dynamic Parallelism to send the new work back to GMU to be prioritized and dispatched. If the kernel that dispatched the additional workload pauses, the GMU will hold it inactive until the dependent work has completed.


Nvidia GPUDirect

Nvidia GPUDirect is a capability that enables GPUs within a single computer, or GPUs in different servers located across a network, to directly exchange data without needing to go to CPU/system memory. The RDMA feature in GPUDirect allows third party devices such as SSDs, NICs, and IB adapters to directly access memory on multiple GPUs within the same system, significantly decreasing the latency of MPI send and receive messages to/from GPU memory. It also reduces demands on system memory bandwidth and frees the GPU DMA engines for use by other CUDA tasks. The Kepler GK110 die also supports other GPUDirect features including Peer‐to‐Peer and GPUDirect for Video.


Video decompression/compression


NVDEC


NVENC

NVENC is Nvidia's power efficient fixed-function encode that is able to take codecs, decode, preprocess, and encode H.264-based content. NVENC specification input formats are limited to H.264 output. But still, NVENC, through its limited format, can support up to 4096x4096 encode. Like Intel's QuickSync, NVENC is currently exposed through a proprietary API, though Nvidia does have plans to provide NVENC usage through CUDA.


Performance

The theoretical single-precision processing power of a Kepler GPU in GFLOPS is computed as 2 (operations per FMA instruction per CUDA core per cycle) × number of CUDA cores × core clock speed (in GHz). Note that like the previous generation Fermi, Kepler is not able to benefit from increased processing power by dual-issuing MAD+MUL like Tesla was capable of. The theoretical double-precision processing power of a Kepler GK110/210 GPU is 1/3 of its single precision performance. This double-precision processing power is however only available on professional Quadro, Tesla, and high-end Titan-branded GeForce cards, while drivers for consumer GeForce cards limit the performance to 1/24 of the single precision performance. The lower performance GK10x dies are similarly capped to 1/24 of the single precision performance.


Kepler dies

Kepler Kepler 2.0 * GK208 * GK210 * GK20A ( Tegra K1)


See also

* List of eponyms of Nvidia GPU microarchitectures *
List of Nvidia graphics processing units This list contains general information about graphics processing units (GPUs) and video cards from Nvidia, based on official specifications. In addition some Comparison of Nvidia nForce chipsets, Nvidia motherboards come with integrated onboard GP ...
* Nvidia NVDEC


References

{{Nvidia Nvidia microarchitectures Nvidia Kepler