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The Intel Personal SuperComputer (Intel iPSC) was a product line of parallel computers in the 1980s and 1990s. The iPSC/1 was superseded by the Intel iPSC/2, and then the Intel iPSC/860.


iPSC/1

In 1984,
Justin Rattner Justin R. Rattner is a retired Intel Senior Fellow, Corporate Vice President and former director of Intel Labs. Previously, he served as the corporation's Chief Technology Officer, where he was responsible for leading Intel's microprocessor, com ...
became manager of the Intel Scientific Computers group in
Beaverton, Oregon Beaverton is a city in Washington County, in the U.S. state of Oregon with a small portion bordering Portland in the Tualatin Valley. The city is among the main cities that make up the Portland metropolitan area. Its population was 97,494 at the ...
. He hired a team that included mathematician
Cleve Moler Cleve Barry Moler is an American mathematician and computer programmer specializing in numerical analysis. In the mid to late 1970s, he was one of the authors of LINPACK and EISPACK, Fortran libraries for numerical computing. He invented MAT ...
. The iPSC used a hypercube of connections between the processors internally inspired by the Caltech Cosmic Cube research project. For that reason, it was configured with nodes numbering with power of two, which correspond to the corners of hypercubes of increasing dimension. Intel announced the iPSC/1 in 1985, with 32 to 128 nodes connected with Ethernet into a hypercube. The system was managed by a personal computer of the
PC/AT The IBM Personal Computer/AT (model 5170, abbreviated as IBM AT or PC/AT) was released in 1984 as the fourth model in the IBM Personal Computer line, following the IBM PC/XT and its IBM Portable PC variant. It was designed around the Intel 802 ...
era running
Xenix Xenix is a discontinued version of the Unix operating system for various microcomputer platforms, licensed by Microsoft from AT&T Corporation in the late 1970s. The Santa Cruz Operation (SCO) later acquired exclusive rights to the software, and e ...
, the "cube manager". Each node had a
80286 The Intel 80286 (also marketed as the iAPX 286 and often called Intel 286) is a 16-bit microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with separate, non- multiplexed address and data buses and also the ...
CPU with
80287 x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating-point coprocessors that worked in tandem with corresponding x86 CPUs. These ...
math coprocessor, 512K of RAM, and eight Ethernet ports (seven for the hypercube interconnect, and one to talk to the cube manager). A message passing interface called NX that was developed by Paul Pierce evolved throughout the life of the iPSC line. Because only the cube manager had connections to the outside world, developing and debugging applications was difficult. The basic models were the iPSC/d5 (five-dimension hypercube with 32 nodes), iPSC/d6 (six dimensions with 64 nodes), and iPSC/d7 (seven dimensions with 128 nodes). Each cabinet had 32 nodes, and prices ranged up to about half a million dollars for the four-cabinet iPSC/d7 model. Extra memory (iPSC-MX) and
vector processor In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and effectively on large one-dimensional arrays of data called ...
(iPSC-VX) models were also available, in the three sizes. A four-dimensional hypercube was also available (iPSC/d4), with 16 nodes. iPSC/1 was called the first parallel computer built from
commercial off-the-shelf Commercial off-the-shelf or commercially available off-the-shelf (COTS) products are packaged or canned (ready-made) hardware or software, which are adapted aftermarket to the needs of the purchasing organization, rather than the commissioning of ...
parts. This allowed it to reach the market about the same time as its competitor from nCUBE, even though the nCUBE project had started earlier. Each iPSC cabinet was (overall) 127 cm x 41 cm x 43 cm. Total computer performance was estimated at 2 M FLOPS. Memory width was 16-bit. Serial #1 iPSC/1 with 32 nodes was delivered to Oak Ridge National Laboratory in 1985.


iPSC/2

The Intel iPSC/2 was announced in 1987. It was available in several configurations, the base setup being one cabinet with 16
Intel 80386 The Intel 386, originally released as 80386 and later renamed i386, is a 32-bit microprocessor introduced in 1985. The first versions had 275,000 transistors80387 x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating-point coprocessors that worked in tandem with corresponding x86 CPUs. These ...
coprocessor on the same module. The operating system and user programs were loaded from a management PC. This PC was typically an Intel 301 with a special interface card. Instead of Ethernet, a custom Direct-Connect Module with eight channels of about 2.8 Mbyte/s data rate each was used for hypercube interconnection. The custom interconnect hardware resulting in higher cost, but reduced communication delays. The software in the management processor was called the System Resource Manager instead of "cube manager". The system allows for expansion up to 128 nodes, each with processor and coprocessor. The base modules could be upgraded to the SX (Scalar eXtension) version by adding a
Weitek Weitek Corporation was an American chip-design company that originally focused on floating-point units for a number of commercial CPU designs. During the early to mid-1980s, Weitek designs could be found powering a number of high-end designs a ...
1167
floating point unit Floating may refer to: * a type of dental work performed on horse teeth * use of an isolation tank * the guitar-playing technique where chords are sustained rather than scratched * ''Floating'' (play), by Hugh Hughes * Floating (psychological ph ...
. Another configuration allowed for each processor module to be paired with a VX (Vector eXtension) module with a dedicated multiplication and addition units. This has the downside that the number of available interface card slots is halved. Having multiple cabinets as part of the same iPSC/2 system is necessary to run the maximum number of nodes and allow them to connect to VX modules. The nodes of iPSC/2 ran the proprietary NX/2 operating system, while the host machine ran
System V Unix System V (pronounced: "System Five") is one of the first commercial versions of the Unix operating system. It was originally developed by AT&T and first released in 1983. Four major versions of System V were released, numbered 1, 2, 3, an ...
or
Xenix Xenix is a discontinued version of the Unix operating system for various microcomputer platforms, licensed by Microsoft from AT&T Corporation in the late 1970s. The Santa Cruz Operation (SCO) later acquired exclusive rights to the software, and e ...
. Nodes could be configured like the iPSC/1 without and local disk storage, or use one of the Direct-Connect Module connections with a
clustered file system A clustered file system is a file system which is shared by being simultaneously mounted on multiple servers. There are several approaches to clustering, most of which do not employ a clustered file system (only direct attached storage for ...
(called concurrent file system at the time). Using both faster node computing elements and the interconnect system improved application performance over the iPSC/1. An estimated 140 iPSC/2 systems were built.


iPSC/860

Intel announced the iPSC/860 in 1990. The iPSC/860 consisted of up to 128 processing elements connected in a hypercube, each element consisting of an Intel i860 at 40–50 MHz or Intel 80386 microprocessor. Memory per node was increased to 8 MB and a similar Direct-Connect Module was used, which limited the size to 128 nodes. One customer was the Oak Ridge National Laboratory. The performance of the iPSC/860 was analyzed in several research projects. The iPSC/860 was also the original development platform for the Tachyon parallel ray tracing engine that became part of the SPEC MPI 2007 benchmark, and is still widely used today. The iPSC line was superseded by a research project called the Touchstone Delta at the
California Institute of Technology The California Institute of Technology (branded as Caltech or CIT)The university itself only spells its short form as "Caltech"; the institution considers other spellings such a"Cal Tech" and "CalTech" incorrect. The institute is also occasional ...
which evolved into the
Intel Paragon The Intel Paragon is a discontinued series of massively parallel supercomputers that was produced by Intel in the 1990s. The Paragon XP/S is a productized version of the experimental ''Touchstone Delta'' system that was built at Caltech, launched ...
.


References

{{DEFAULTSORT:Intel Ipsc X86 supercomputers Massively parallel computers Ipsc