Intel Core M is a family of
ultra low-voltage microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
s belonging to the
Intel Core series and designed specifically for ultra-thin notebooks, 2-in-1 detachables, and other
mobile device
A mobile device (or handheld computer) is a computer small enough to hold and operate in the hand. Mobile devices typically have a flat LCD or OLED screen, a touchscreen interface, and digital or physical buttons. They may also have a physical ...
s. The
thermal design power (TDP) of all Core M microprocessors is 5
watt
The watt (symbol: W) is the unit of power or radiant flux in the International System of Units (SI), equal to 1 joule per second or 1 kg⋅m2⋅s−3. It is used to quantify the rate of energy transfer. The watt is named after James Wa ...
s or lower. Intel Core M microprocessors are generally used in fanless devices due to their low TDP.
Broadwell microarchitecture (5th generation)
"Broadwell-Y" (SoC, dual-core, 14 nm)
* All models support: ''
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3,
SSSE3,
SSE4.1
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more ...
,
SSE4.2,
AVX AVX may refer to:
Technology
* Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture
** AVX2, an expansion of the AVX instruction set
** AVX-512, 512-bit extensions to the 256-bit AVX
* AVX Corporation, a m ...
,
AVX2
Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge ...
,
FMA3
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are indi ...
, Enhanced Intel
SpeedStep Technology (EIST),
Intel 64, XD bit (an
NX bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
implementation),
Intel VT-x,
Intel VT-d,
Hyper-threading,
Turbo Boost
Intel Turbo Boost is Intel's trade name for central processing units (CPUs) dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher resulting ...
,
AES-NI, Smart Cache.''
* All models except M-5Y10a and M-5Y70 support
Configurable TDP.
* M-5Y70 and M-5Y71 also support ''
Intel vPro''.
* GPU and memory controller (up to 2 × DDR3-1600) are integrated onto the processor die.
* Peripherals include 12 lanes of PCI Express 2.0, in x4, x2, and x1 configurations.
* Package size: 30 mm × 16.5 mm
* Transistors: 1.3 billion
* Die size: 82 mm²
Skylake microarchitecture (6th generation)
"Skylake-Y" (SoC, dual-core, 14 nm)
* All models support: ''
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3,
SSSE3,
SSE4.1
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more ...
,
SSE4.2,
AVX AVX may refer to:
Technology
* Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture
** AVX2, an expansion of the AVX instruction set
** AVX-512, 512-bit extensions to the 256-bit AVX
* AVX Corporation, a m ...
,
AVX2
Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge ...
,
FMA3
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are indi ...
, Enhanced Intel
SpeedStep Technology (EIST),
Intel 64, XD bit (an
NX bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
implementation),
Intel VT-x,
Intel VT-d,
Hyper-threading,
Turbo Boost
Intel Turbo Boost is Intel's trade name for central processing units (CPUs) dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher resulting ...
,
AES-NI, Smart Cache,''
Configurable TDP.
* m5-6Y57 and m7-6Y75 also support ''
Intel vPro,
Intel TXT''.
* GPU and memory controller (up to 2 × DDR3-1866) are integrated onto the processor die.
* Peripherals include 10 lanes of PCI Express 3.0, in x4, x2, and x1 configurations.
* Package size: 20 mm × 16.5 mm
* Transistors: TBD
* Die size: TBD
Kaby Lake microarchitecture (7th/8th generation)
"Kaby Lake-Y" (SoC, dual-core, 14 nm)
Core m5 and Core m7 models were rebranded as
Core i5 and
Core i7.
* All models support: ''
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3,
SSSE3,
SSE4.1
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more ...
,
SSE4.2,
AVX AVX may refer to:
Technology
* Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture
** AVX2, an expansion of the AVX instruction set
** AVX-512, 512-bit extensions to the 256-bit AVX
* AVX Corporation, a m ...
,
AVX2
Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge ...
,
FMA3
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are indi ...
,
SGX,
MPX, Enhanced Intel
SpeedStep Technology (EIST),
Intel 64, XD bit (an
NX bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
implementation),
Intel VT-x,
Intel VT-d,
Hyper-threading,
Turbo Boost
Intel Turbo Boost is Intel's trade name for central processing units (CPUs) dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher resulting ...
,
AES-NI, Smart Cache, ''
Configurable TDP.
* GPU and memory controller (up to 2 × LPDDR3-1866) are integrated onto the processor die.
* Peripherals include 10 lanes of PCI Express 3.0, in x4, x2, and x1 configurations.
* Package size: 20 mm × 16.5 mm
* Transistors: TBD
* Die size: TBD
"Amber Lake-Y" (dual-core, 14 nm)
See also
*
System on a chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
(SoC)
References
External links
Intel Core M Processors Product Order Code TableIntel processor price list
{{DEFAULTSORT:List Of Intel Core M microprocessors
*Core M
Intel Core M
Intel Core M is a family of ultra low-voltage microprocessors belonging to the Intel Core series and designed specifically for ultra-thin notebooks, 2-in-1 detachables, and other mobile devices. The thermal design power (TDP) of all Core M microp ...