Gracemont is a
microarchitecture for low-power processors used in
systems on a chip (SoCs) made by
Intel, and is the successor to
Tremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of the
Alder Lake
Alder Lake is Intel's codename for the 12th generation of Intel Core processors based on a hybrid architecture utilizing Golden Cove performance cores and Gracemont efficient cores. It is fabricated using Intel's Intel 7 process, previous ...
and
Raptor Lake
Raptor Lake is Intel's codename for the 13th-generation of Intel Core processors based on a hybrid architecture, utilizing Raptor Cove performance cores and Gracemont efficient cores. Raptor Lake launched on October 20, 2022. Mobile version ...
processors.
Design
Gracemont is the fourth generation
out-of-order low-power
Atom microarchitecture
On i9-12900K, power for eight cores at 3.9GHz was measured at 48W, for AVX2 workloads.
The Gracemont microarchitecture has the following enhancements over
Tremont:
* Level 1 cache per core:
** eight-way-associative 64 KB instruction cache
** eight-way-associative 32 KB data cache
* New On-Demand Instruction Length Decoder
* Instruction issue increased to five per clock (from four)
* Instruction retire increased to eight per clock (from seven)
* Execution ports (functional units) there are now 17 (from eight)
* Reorder buffer increased to 256 entries (from 208)
* Improved branch prediction
* Support for
AVX,
AVX2,
FMA3
The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are indi ...
and
AVX-VNNI instructions
Technology
*
System on a chip (SoC) architecture
* 3D
tri-gate transistors
* 64 KB L1 instruction cache, up from 32 KB in
Tremont
* 2 or 4 MB shared
L2 cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
per 4-core module
Alder Lake-S/H/P/U family has 2 MB. Raptor Lake-S/H/P/U family has 4 MB.
*
Intel Xe
Intel Xe (stylized as Xe and pronounced as two separate letters, abbreviation for "eXascale for everyone"), earlier known unofficially as Gen12, is a GPU architecture developed by Intel.
Intel Xe includes a new instruction set architecture. Th ...
(Gen. 12.2) GPU with
DirectX 12
Microsoft DirectX is a collection of application programming interfaces (APIs) for handling tasks related to multimedia, especially game programming and video, on Microsoft platforms. Originally, the names of these APIs all began with "Direct", ...
,
OpenGL 4.6,
Vulkan 1.3,
OpenGL ES 3.2 and
OpenCL 3.0 support.
*
Thermal design power (TDP)
** 10 W desktop processors
** 6 W mobile processors
Products
The microarchitecture is used as the efficient cores of the 12th generation of Intel Core hybrid processors (codenamed "Alder Lake") and the 13th generation of Intel Core hybrid processors (codenamed "Raptor Lake").
Mobile processors (Alder Lake-N)
[https://ark.intel.com/content/www/us/en/ark/products/codename/232598/products-formerly-alder-laken.html]
Processors for base transceiver stations ( Grand Ridge)
See also
*
List of Intel CPU microarchitectures
The following is a ''partial'' list of Intel CPU microarchitectures. The list is ''incomplete''. Additional details can be found in Intel's Tick–tock model and Process–architecture–optimization model.
x86 microarchitectures
16-bit
...
References
Intel x86 microprocessors
Intel microarchitectures
X86 microarchitectures
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