Drake (microprocessor)

Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus.

Overview

The ''Xeon'' brand has been maintained over several generations of IA-32 and x86-64 processors. Older models added the ''Xeon'' moniker to the end of the name of their corresponding desktop processor, but more recent models used the name ''Xeon'' on its own. The ''Xeon'' CPUs generally have more cache than their desktop counterparts in addition to multiprocessing capabilities.

Some shortcomings that make Xeon processors unsuitable for most consumer-grade desktop PCs include lower clock rates at the same price point (since servers run more tasks in parallel than desktops, core counts are more important than clock rates), usually an absence of an integrated graphics processing unit (GPU), and lack of support for overclocking. Despite such disadvantages, Xeon processors have always had popularity among some desktop users (video editors and other power users), mainly due to higher core count potential, and higher performance to price ratio vs. the Core i7 in terms of total computing power of all cores. Since most Intel Xeon CPUs lack an integrated GPU, systems built with those processors require a discrete graphics card or a separate GPU if computer monitor output is desired.

Intel Xeon is a distinct product line from the similarly-named Intel Xeon Phi. The first-generation Xeon Phi is a completely different type of device more comparable to a graphics card; it is designed for a PCI Express slot and is meant to be used as a multi-core coprocessor, like the Nvidia Tesla. In the second generation, Xeon Phi evolved into a main processor more similar to the Xeon. It conforms to the same socket as a Xeon processor and is x86-compatible; however, as compared to Xeon, the design point of the Xeon Phi emphasizes more cores with higher memory bandwidth.

P6-based Xeon

Pentium II Xeon

The first Xeon-branded processor was the Pentium II Xeon (code-named "Drake"). It was released in 1998, replacing the Pentium Pro in Intel's server lineup. The Pentium II Xeon was a "'' Deschutes''" Pentium II (and shared the same product code: 80523) with a full-speed 512 kB (1 kB = 1024 B), 1 MB (1 MB = 1024 kB = 1024² B), or 2 MB L2 cache. The L2 cache was implemented with custom 512 kB SRAMs developed by Intel. The number of SRAMs depended on the amount of cache. A 512 kB configuration required one SRAM, a 1 MB configuration: two SRAMs, and a 2 MB configuration: four SRAMs on both sides of the PCB. Each SRAM was a 12.90 mm by 17.23 mm (222.21 mm) die fabricated in a 0.35 µm four-layer metal CMOS process and packaged in a cavity-down wire-bonded land grid array (LGA). The additional cache required a larger module and thus the Pentium II Xeon used a larger slot, Slot 2. It was supported by the 440GX dual-processor workstation chipset and the 450NX quad- or octo-processor chipset.

Pentium III Xeon

In 1999, the Pentium II Xeon was replaced by the Pentium III Xeon. Reflecting the incremental changes from the Pentium II "'' Deschutes''" core to the Pentium III "'' Katmai''" core, the first Pentium III Xeon, named "Tanner", was just like its predecessor except for the addition of Streaming SIMD Extensions (SSE) and a few cache controller improvements. The product codes for Tanner mirrored that of ''Katmai''; 80525.

The second version, named "Cascades", was based on the Pentium III "'' Coppermine''" core. The "Cascades" Xeon used a 133 MHz bus and relatively small 256 kB on-die L2 cache resulting in almost the same capabilities as the Slot 1 ''Coppermine'' processors, which were capable of dual-processor operation but not quad-processor operation.

To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2 MB". That came in two variants: with 1 MB or 2 MB of L2 cache. Its bus speed was fixed at 100 MHz, though in practice the cache was able to offset this. The product code for Cascades mirrored that of ''Coppermine''; 80526.

Netburst-based Xeon

Xeon (DP) and Xeon MP (32-bit)

Foster

In mid-2001, the Xeon brand was introduced ("Pentium" was dropped from the name). The initial variant that used the new NetBurst microarchitecture, "Foster", was slightly different from the desktop Pentium 4 ("'' Willamette''"). It was a decent chip for workstations, but for server applications it was almost always outperformed by the older Cascades cores with a 2 MB L2 cache and AMD's Athlon MP. Combined with the need to use expensive Rambus Dynamic RAM, the Foster's sales were somewhat unimpressive.

At most two Foster processors could be accommodated in a symmetric multiprocessing ( SMP) system built with a mainstream chipset, so a second version (Foster MP) was introduced with a 1 MB L3 cache and the Jackson Hyper-Threading capacity. This improved performance slightly, but not enough to lift it out of third place. It was also priced much higher than the dual-processor (DP) versions. The ''Foster'' shared the 80528 product code with Willamette.

Prestonia

In 2002 Intel released a 130 nm version of Xeon branded CPU, codenamed "Prestonia". It supported Intel's new Hyper-Threading technology and had a 512 kB L2 cache. This was based on the "'' Northwood''" Pentium 4 core. A new server chipset, E7500 (which allowed the use of dual-channel DDR SDRAM), was released to support this processor in servers, and soon the bus speed was boosted to 533 MT/s (accompanied by new chipsets: the E7501 for servers and the E7505 for workstations). The ''Prestonia'' performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP branded CPUs (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor.

"Gallatin"

Subsequent to the ''Prestonia'' was the "Gallatin", which had an L3 cache of 1 MB or 2 MB. Its Xeon MP version also performed much better than the ''Foster MP'', and was popular in servers. Later experience with the 130 nm process allowed Intel to create the Xeon MP branded ''Gallatin'' with 4 MB cache. The Xeon branded ''Prestonia'' and ''Gallatin'' were designated 80532, like Northwood.

Xeon (DP) and Xeon MP (64-bit)

Nocona and Irwindale

Due to a lack of success with Intel's Itanium and Itanium 2 processors, AMD was able to introduce x86-64, a 64-bit extension to the x86 architecture. Intel followed suit by including Intel 64 (formerly EM64T; it is almost identical to AMD64) in
the 90 nm version of the Pentium 4 ("'' Prescott''"), and a Xeon version codenamed "Nocona" with 1 MB L2 cache was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for PCI Express, DDR-II and Serial ATA. The Xeon was noticeably slower than AMD's Opteron, although it could be faster in situations where Hyper-Threading came into play.

A slightly updated core called "Irwindale" was released in early 2005, with 2 MB L2 cache and the ability to have its clock speed reduced during low processor demand. Although it was a bit more competitive than the ''Nocona'' had been, independen
tests
showed that AMD's Opteron still outperformed ''Irwindale''. Both of these Prescott-derived Xeons have the product code 80546.

Cranford and Potomac

64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of ''Nocona'', while the more expensive "Potomac" was a ''Cranford'' with 8 MB of L3 cache. Like Nocona and Irwindale, they also have product code 80546.

Dual-Core Xeon

"Paxville DP"

The first dual-core CPU branded Xeon, codenamed Paxville DP, product code 80551, was released by Intel on October 10, 2005. Paxville DP had NetBurst microarchitecture, and was a dual-core equivalent of the single-core Irwindale (related to the Pentium D branded " Smithfield") with 4 MB of L2 Cache (2 MB per core). The only Paxville DP model released ran at 2.8 GHz, featured an 800 MT/s front side bus, and was produced using a 90 nm process.

7000-series "Paxville MP"

An MP-capable version of Paxville DP, codenamed Paxville MP, product code 80560, was released on November 1, 2005. There are two versions: one with 2 MB of L2 Cache (1 MB per core), and one with 4 MB of L2 (2 MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90 nm process. Paxville MP clock ranges between 2.67 GHz and 3.0 GHz (model numbers 7020–7041), with some models having a 667 MT/s FSB, and others having an 800 MT/s FSB.

7100-series "Tulsa"

Released on August 29, 2006, the 7100 series, codenamed Tulsa (product code 80550), is an improved version of Paxville MP, built on a 65 nm process, with 2 MB of L2 cache (1 MB per core) and up to 16 MB of L3 cache. It uses Socket 604. Tulsa was released in two lines: the N-line uses a 667 MT/s FSB, and the M-line uses an 800 MT/s FSB. The N-line ranges from 2.5 GHz to 3.5 GHz (model numbers 7110N-7150N), and the M-line ranges from 2.6 GHz to 3.4 GHz (model numbers 7110M-7140M). L3 cache ranges from 4 MB to 16 MB across the models.

5000-series "Dempsey"

On May 23, 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed Dempsey (product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a NetBurst microarchitecture processor produced using a 65 nm process, and is virtually identical to Intel's " Presler" Pentium Extreme Edition, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50 GHz and 3.73 GHz (model numbers 5020–5080). Some models have a 667 MT/s FSB, and others have a 1066 MT/s FSB. Dempsey has 4 MB of L2 Cache (2 MB per core). A Medium Voltage model, at 3.2 GHz and 1066 MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors: LGA 771, also known as Socket J. Dempsey was the first Xeon core in a long time to be somewhat competitive with its Opteron-based counterparts, although it could not claim a decisive lead in any performance metric – that would have to wait for its successor, the Woodcrest.

Pentium M (Yonah) based Xeon

LV (ULV), "Sossaman"

On March 14, 2006, Intel released a dual-core processor codenamed Sossaman and branded as ''Xeon'' LV (low-voltage). Subsequently, an ULV (ultra-low-voltage) version was released. The ''Sossaman'' was a low-/ultra-low-power and double-processor capable CPU (like AMD Quad FX), based on the "'' Yonah''" processor, for ultradense non-consumer environment (i.e., targeted at the blade-server and embedded markets), and was rated at a thermal design power (TDP) of 31 W (LV: 1.66 GHz, 2 GHz and 2.16 GHz) and 15 W (ULV: 1.66 GHz). As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667 MT/s front side bus, and dual-core processing, but did not support 64-bit operations, so it could not run 64-bit server software, such as Microsoft Exchange Server 2007, and therefore was limited to 16 GB of memory. A planned successor, codenamed "'' Merom MP''" was to be a drop-in upgrade to enable ''Sossaman''-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the '' Woodcrest LV'' processor leaving the ''Sossaman'' at a dead-end with no upgrade path.

Core-based Xeon

Dual-Core

3000-series "Conroe"

The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU, released at the end of September 2006, was the first Xeon for single-CPU operation. The same processor is branded as Core 2 Duo or as Pentium Dual-Core and Celeron, with varying features disabled.
They use LGA 775 (Socket T), operate on a 1066 MHz front-side bus, support Enhanced Intel SpeedStep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Conroe Processors with a number ending in "5" have a 1333 MT/s FSB.

* Models marked with a star are not present in Intel's database

3100-series "Wolfdale"

The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just a rebranded version of the Intel's mainstream Core 2 Duo E7000/E8000 and Pentium Dual-Core