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HAL SPARC64
SPARC64 is a microprocessor developed by HAL Computer Systems and fabricated by Fujitsu. It implements the SPARC V9 instruction set architecture (ISA), the first microprocessor to do so. SPARC64 was HAL's first microprocessor and was the first in the SPARC64 brand. It operates at 101 and 118 MHz. The SPARC64 was used exclusively by Fujitsu in their systems; the first systems, the Fujitsu HALstation Model 330 and Model 350 workstations, were formally announced in September 1995 and were introduced in October 1995, two years late. It was succeeded by the SPARC64 II (previously known as the SPARC64+) in 1996. Description The SPARC64 is a superscalar microprocessor that issues four instructions per cycle and executes them out of order. It is a multichip design, consisting of seven dies: a CPU die, MMU die, four CACHE dies and a CLOCK die. CPU die The CPU die contains the majority of logic, all of the execution units and a level 0 (L0) instruction cache. The execution uni ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
HAL Computer Systems
HAL Computer Systems, Inc was a Campbell, California-based computer manufacturer founded in 1990 by Andrew Heller, a principal designer of the original IBM POWER architecture. His idea was to build computers based on a RISC architecture for the commercial market. The inspiration of the name comes from the Arthur C. Clarke novel '' 2001: A Space Odyssey''. The company's intent to develop a high-performance microprocessor implementing the SPARC architecture prompted Fujitsu to fund the company in 1991. $40.2 million was invested in return for a 44% stake. As part of the deal: # Fujitsu agreed to not increase their ownership of HAL. # Fujitsu would fabricate HAL's microprocessor designs. # Fujitsu would make its patents available to HAL. # Fujitsu would manufacture some of the HAL machines, and market them in Asia. In return, HAL gave Fujitsu access to the technology it was developing. By this time, HAL had 140 employees. In mid-1993, Heller resigned from his position as chair ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Multiprocessing
Multiprocessing (MP) is the use of two or more central processing units (CPUs) within a single computer system. The term also refers to the ability of a system to support more than one processor or the ability to allocate tasks between them. There are many variations on this basic theme, and the definition of multiprocessing can vary with context, mostly as a function of how CPUs are defined ( multiple cores on one die, multiple dies in one package, multiple packages in one system unit, etc.). A multiprocessor is a computer system having two or more processing units (multiple processors) each sharing main memory and peripherals, in order to simultaneously process programs. A 2009 textbook defined multiprocessor system similarly, but noted that the processors may share "some or all of the system’s memory and I/O facilities"; it also gave tightly coupled system as a synonymous term. At the operating system level, ''multiprocessing'' is sometimes used to refer to the executi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Computergram International
''Computergram International'' was a daily, pre-Internet newsletter covering enterprise information technology, published in London by APT Data Services from 1984. It eventually merged into the electronic ''ComputerWire'' service, and is now owned by ''Tech Monitor'', one of the specialist titles within the New Statesman Media Group.'Computer Business Review Has Some News…' ''Tech Monitor'', 10 March, 2021 APT Data Services APT Data Services was founded in London by Peter White (publisher) and Tim Palmer (editor) in 1984. Peter White was previously the editor of ''Datalink Magazine'' from 1978. Palmer had worked as an engineer at GEC before c ...[...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SPARC64 V
The SPARC64 V (''Zeus'') is a SPARC, SPARC V9 microprocessor designed by Fujitsu. The SPARC64 V was the basis for a series of successive processors designed for servers, and later, supercomputers. The servers series are the SPARC64 V+, VI, VI+, VII, VII+, X, X+ and XII. The SPARC64 VI and its successors up to the VII+ were used in the Fujitsu and Sun (later Oracle Corporation, Oracle) SPARC Enterprise, SPARC Enterprise M-Series servers. In addition to servers, a version of the SPARC64 VII was also used in the commercially available Fujitsu FX1 supercomputer. As of October 2017, the SPARC64 XII is the latest server processor, and it is used in the Fujitsu and Oracle M12 servers. The supercomputer series was based on the SPARC64 VII, and are the SPARC64 VIIfx, IXfx, and XIfx. The SPARC64 VIIIfx was used in the K computer, and the SPARC64 IXfx in the commercially available PRIMEHPC FX10. As of July 2016, the SPARC64 XIfx is the latest supercomputer processor, and it is used in the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Ball Grid Array
A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds. Soldering of BGA devices requires precise control and is usually done by automated processes such as in computer-controlled automatic reflow ovens. Description The BGA is descended from the pin grid array (PGA), which is a package with one face covered (or partly covered) with pins in a grid pattern which, in operation, conduct electrical signals between the integrated circuit and the printed circuit board (PCB) ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Copper Interconnect
Copper interconnects are used in integrated circuits to reduce propagation delays and power consumption. Since copper is a better conductor than aluminium, ICs using copper for their interconnects can have interconnects with narrower dimensions, and use less energy to pass electricity through them. Together, these effects lead to ICs with better performance. They were first introduced by IBM, with assistance from Motorola, in 1997. The transition from aluminium to copper required significant developments in fabrication techniques, including radically different methods for patterning the metal as well as the introduction of barrier metal layers to isolate the silicon from potentially damaging copper atoms. Although the methods of superconformal copper electrodepostion were known since late 1960, their application at the (sub)micron via scale (e.g. in microchips) started only in 1988-1995 (see figure). By year 2002 it became a mature technology, and research and development effo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Double Data Rate
In computing, double data rate (DDR) describes a computer bus that transfers data on both the rising and falling edges of the clock signal and hence doubles the memory bandwidth by transferring data twice per clock cycle. This is also known as double pumped, dual-pumped, and double transition. The term toggle mode is used in the context of NAND flash memory. Overview The simplest way to design a clocked electronic circuit is to make it perform one transfer per full cycle (rise and fall) of a clock signal. This, however, requires that the clock signal changes twice per transfer, while the data lines change at most once per transfer. When operating at a high bandwidth, signal integrity limitations constrain the clock frequency. By using both edges of the clock, the data signals operate with the same limiting frequency, thereby doubling the data transmission rate. This technique has been used for microprocessor front-side busses, Ultra-3 SCSI, expansion buses ( AGP, PCI ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Visual Instruction Set
Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 microprocessors developed by Sun Microsystems. There are five versions of VIS: VIS 1, VIS 2, VIS 2+, VIS 3 and VIS 4. History VIS 1 was introduced in 1994 and was first implemented by Sun in their UltraSPARC microprocessor (1995) and by Fujitsu in their SPARC64 GP microprocessors (2000). VIS 2 was first implemented by the UltraSPARC III. All subsequent UltraSPARC and SPARC64 microprocessors implement the instruction set. VIS 3 was first implemented in the SPARC T4 microprocessor. VIS 4 was first implemented in the SPARC M7 microprocessor. Differences vs x86 VIS is not an instruction toolkit like Intel's MMX and SSE. MMX has only 8 registers shared with the FPU stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers. As with the SIMD instruction set extensions on other RISC processors, VIS strictly conforms to the main princ ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Solaris (operating System)
Oracle Solaris is a proprietary software, proprietary Unix operating system offered by Oracle Corporation, Oracle for SPARC and x86-64 based workstations and server (computing), servers. Originally developed by Sun Microsystems as Solaris, it superseded the company's earlier SunOS in 1993 and became known for its scalability, especially on SPARC systems, and for originating many innovative features such as DTrace, ZFS and Time Slider. After the Acquisition of Sun Microsystems by Oracle Corporation, Sun acquisition by Oracle in 2010, it was renamed Oracle Solaris. Solaris was registered as compliant with the Single UNIX Specification until April 29, 2019. Historically, Solaris was developed as proprietary software. In June 2005, Sun Microsystems released most of the codebase under the CDDL license, and founded the OpenSolaris Open-source software, open-source project. Sun aimed to build a developer and user community with OpenSolaris; after the Oracle acquisition in 2010, the Open ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Branch Predictor
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow in the instruction pipeline. Branch predictors play a critical role in achieving high performance in many modern pipelined microprocessor architectures. Two-way branching is usually implemented with a conditional jump instruction. A conditional jump can either be "taken" and jump to a different place in program memory, or it can be "not taken" and continue execution immediately after the conditional jump. It is not known for certain whether a conditional jump will be taken or not taken until the condition has been calculated and the conditional jump has passed the execution stage in the instruction pipeline (see fig. 1). Without branch prediction, the processor would have to wait until the conditional jump instruction has passed the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Ultra Port Architecture
The Ultra Port Architecture (UPA) bus was developed by Sun Microsystems as a high-speed graphics card to CPU interconnect, beginning with the Ultra 1 workstation in 1995. See also *List of device bandwidths A list is a set of discrete items of information collected and set forth in some format for utility, entertainment, or other purposes. A list may be memorialized in any number of ways, including existing only in the mind of the list-maker, but ... External links UPA Bus Whitepaper Computer buses Sun Microsystems hardware Computer-related introductions in 1995 {{Compu-hardware-stub ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Tape Out
In electronics and photonics design, tape-out or tapeout is the final stage of the design process for integrated circuits or printed circuit boards before they are sent for manufacturing. The tapeout is specifically the point at which the graphic for the photomask of the circuit is sent to the fabrication facility. The name originates from the use of magnetic tape to send the data to the manufacturing facility. Procedures involved The term ''tapeout'' currently is used to describe the creation of the photomask itself from the final approved electronic CAD file. Designers may use this term to refer to the writing of the final file to disk or CD and its subsequent transmission to the semiconductor foundry; however, in current practice, the foundry will perform checks and make modifications to the mask design specific to the manufacturing process before actual tapeout. These modifications of the mask data include: * ''Chip finishing'' which includes custom designations and stru ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
